发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: To decrease the density of defects caused by implantation and oxidization processes by oxidizing the selected section of wafer, covering the essential section of 1st oxide area with a nitride, performing ion implantation and forming a 2nd oxide area through 2nd selective oxidization. CONSTITUTION: The exposed area of selected section of oxide 3 is formed, the oxidization process is executed, and a 1st oxide area 7 is formed. Next, a nitride layer 5 and the residual oxide 3 are removed, and a new thin oxide layer 4 is grown. Therefore, a wafer 1 has an oxide surface 4 and all the surface 4 is covered with a nitride layer 9. The 2nd nitride layer 9 and the oxide surface 4 have the almost equal thickness and that thickness is made less than 70μm. Next, the ion implantation is performed in the exposed area between field oxide areas 7 in order to form a doped area 11, a dopant is driven in and after the implantation, the wafer is annealed. Further, a 2nd oxide area 13 is formed between the field oxide areas 7.
申请公布号 JPH05190557(A) 申请公布日期 1993.07.30
申请号 JP19920175819 申请日期 1992.07.03
申请人 AMERICAN TELEPH & TELEGR CO <ATT> 发明人 RICHIYAADO UIRIAMU GUREGOA;CHIYUNGU WAI REUN
分类号 H01L21/322;H01L21/32;H01L21/762 主分类号 H01L21/322
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