SEMICONDUCTOR INTEGRATED CIRCUIT AND TEST METHOD,申请号JP19900035479-传众专利搜索

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发明名称	SEMICONDUCTOR INTEGRATED CIRCUIT AND TEST METHOD
摘要
申请公布号	JPH03238371(A)	申请公布日期	1991.10.24
申请号	JP19900035479	申请日期	1990.02.15
申请人	FUJITSU LTD	发明人	NAKAHARA HIDETOSHI
分类号	G01R31/28;G01R31/30;G01R31/3185;G11C29/00;G11C29/02;G11C29/06;G11C29/56;H01L21/66;H01L21/822;H01L21/98;H01L27/04	主分类号	G01R31/28
代理机构		代理人
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