| 摘要 |
A digital-to-analog converter has a plurality of switches, each of which being responsive to a bit of a digital signal having n bits, to selectively pass therethrough a weighted current having a magnitude of 2i-1Ic where i is an ith bit. The respective weighted current flows through a corresponding transistor into a resistor ladder circuit. The resistor ladder circuit has a plurality of arms, each of which receive a weighted current from the emitter of a corresponding transistor. The digital-to-analog converter further includes a plurality of base resistors connected in series such that the bases of the transistors are connected with corresponding junctions of the base resistors r1-r7. The plurality of base resistors carry a first current therethrough. A current control circuit BC for controlling the first current through the series-connected base resistors to maintain emitter voltages of two predetermined transistors of the plurality of transistors such that the emitter voltages of the two predetermined transistors are always the same.
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