| 摘要 |
PURPOSE:To reduce the area with a limited number of elements and to increase operating margin with low power consumption by connecting an IN/OUT terminal for memory signal to the contact point of a constant current source and a negative differential resistance element through a switching element, thereby providing sufficient voltage for reading and writing at the contact point. CONSTITUTION:A negative transistor Q8 to operate as a constant current source and a negative differential diode D of a differential resistance element are connected, in series, between source voltage VDD and earth electrode GND. An IN/OUT terminal is connected to the contact point P of the transistor Q8 and the diode D through a transfer gate Q7 of a switching element. The IN/OUT terminal corresponds to bit line in the memory cell array mechanism. Sufficient voltage for reading and writing is provided at the contact point P through the transfer gate Q7. As a result, on SRAM cell can be obtained which has small area due to a limited number of elements, and large operating margin with low power consumption. |
