摘要 |
PURPOSE:To change a delay time even during the operation of the circuit without replacement of components. CONSTITUTION:A signal inputted from an input terminal 1 is given to an NPN transistor(TR) 2, in which the signal is divided into an inverting signal at the collector side and a noninverting signal at the emitter side. The phase of the signal is delayed by a resistance of a 3rd resistor 7 and a sum of the capacitance of a capacitor and a variable capacitor and the result is outputted from a delay signal output terminal 9. When the delay time is changed, a control signal comparator circuit 12 selects and outputs any of control signals inputted from input terminals 111-11n. A control signal output circuit 13 changes its output voltage based on the selected control signal so as to change the capacitance of a variable capacitor 10. Thus, the sum of the capacitance of the capacitor 8 and the variable capacitor 10 is changed, resulting that the delay time of the input signal of the entire circuit is changed. |