| 摘要 |
PURPOSE:To provide the DRAM having a small cell size almost the some as the size of an SGT and high reliability. CONSTITUTION:Word lines 15 are formed via gate oxide films 14 on a (p) type silicon substrate 11 and (n) type diffusion layers 19, 20 are formed in the respective memory cell regions holding the word lines 15. Bit lines 21 connected to the (n) type diffusion layers 20 are disposed and are connected to the (n) type diffusion layers 19, by which accumulated node electrodes 22 overlapping on the word lines 15 coated with oxide films 16, 17 are formed. Grooves 18 are formed on the substrate along the word lines 15 in the stacked capacitor structure disposed with plate electrodes 25 via capacitor oxide films 24 on the accumulated node electrodes 22. The (n) type diffusion layers 19 are formed in the side wall parts of the grooves 18 and the accumulated node electrodes 22 are connected by the side wall parts to the (n) type diffusion layers 19. |
