发明名称 SEMICONDUCTOR MEMORY WRITING AND ERASING ELECTRICALLY
摘要 <p>PURPOSE:To reduce the distribution range of a threshold voltage and to prevent a malfunction due to an excess erasure memory cell by correcting the threshold value voltage to the memory cell having a prescribed threshold value voltage or below after the application of an erasing voltage. CONSTITUTION:Write is performed to the memory cell whose threshold value voltage is lower than a verifying voltage due to verifying operation after erasing. Then, though a voltage generated at a node 21 is transmitted on a signal line 49a, the voltage is a voltage which VPP/VCC is resistance-divided by a resistance value R11 and the resistance value R12+R13. A voltage Vew is generated to the signal line 49b and 46a by a comparator circuit 49 in accordance with the writing voltage Vew after erasure on the signal line 49a. Thus, the threshold value voltage change quantity of the memory cell is reduced since the low voltage Vew is applied to a selective word line from an X decoder. Thus, the distribution range of the threshold value voltage of the memory cell is narrowed and the memory cell of an excess erasure state is eliminated.</p>
申请公布号 JPH05182481(A) 申请公布日期 1993.07.23
申请号 JP19920000410 申请日期 1992.01.06
申请人 MITSUBISHI ELECTRIC CORP 发明人 KOBAYASHI SHINICHI;TERADA YASUSHI;NAKAYAMA TAKESHI;MIYAWAKI YOSHIKAZU;FUTATSUYA TOMOSHI
分类号 G11C17/00;G11C16/02;G11C16/06 主分类号 G11C17/00
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