发明名称 HIGH SPEED LOW ADDRESS BUFFER
摘要 The row address buffer improves a signal generation time and a delay time. The row address input signal (Pras) from the latch type sense amplifier is applied to the gates of N channel MOS TRs (MN35)(MN36), and CMOS latch type sense amp. consisting of NMOS TRs (MN32)(MN34) and PMOS TRs (MP31)(MP33) is connected between the source and the drain of previous NMOS TRs (MN35)(MN36). Similarly, (Pras) is also applied to the gate of NMOS TRs (MN42)(MN41), and CMOS latch type sense Amp. consisting PMOS TRs (MP37)(MP38).
申请公布号 KR930006626(B1) 申请公布日期 1993.07.21
申请号 KR19900012142 申请日期 1990.08.08
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM, HONG - JU;LEE, KYU - HONG;KIM, DAE - YONG
分类号 G11C11/408;(IPC1-7):G11C11/408 主分类号 G11C11/408
代理机构 代理人
主权项
地址