发明名称 VERFAHREN ZUM HERSTELLEN VON OPTIMIERTEN KOMPLEMENTAEREN MOS-FELDEFFEKTTRANSISTOREN IN VLSI-TECHNIK.
摘要 Masking for the individual ion implantations is carried out with photoresists and/or Si oxide or Si nitride structures and the gate electrodes are provided with spacer oxide to prevent under-diffusion of the implanted source/drain zones under the gate area. The novel features are (a) deposition of SiO2 film in a thickness corresp. to the spacer oxide width of the gate of the future p-channel transistors on a p- or n-doped Si substrate, (b) deposition of a Si nitride film; (c) carrying out a photoresist technique and structurisation of the double SiO2-Si nitride film (d) carrying out thermal oxidn. after removal of the photoresist (e) carrying out final implantation for the n-channel transistor; (f) deposition a second SiO2 film and anisotropic re-etching (g) carrying out source/drain implantation to produce the n-channel transistors and diffusion of the implanted dopants; (h) applying a photoresist mask to the n-channel zones not covered by the double film and removing the residual second SiO2 film on the stages in the p-channel zone by isotropic over-etching; (i) removing the Si nitride film; (j) anisotropic re-etci--re-etching of the SiO2 film ; (k) carrying out source drain ion implantation to produce the p-channel transistors and removal of the photoresist mask; and (l) prodn. of the intermediate insulating oxide, the contact hole zones and the metallisation in conventional manner.
申请公布号 DE3786111(D1) 申请公布日期 1993.07.15
申请号 DE19873786111 申请日期 1987.03.19
申请人 SIEMENS AG, 8000 MUENCHEN, DE 发明人 MUELLER, WOLFGANG, DR., W-8011 PUTZBRUNN, DE
分类号 H01L21/82;H01L29/08;(IPC1-7):H01L21/82 主分类号 H01L21/82
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