| 摘要 |
PURPOSE:To improve the reliability of data transfer by providing a mechanism for checking a data transfer route and using transfer route information for transfer data from a processor module (PM device) to each data storage controller. CONSTITUTION:In the information processor for which plural PM devices 1 and plural data storage controllers 2 and 3 are connected by plural adapter common busses 40 and 41, data storage controllers 2 and 3 are provided with mechanisms (bus route diagnostic circuits) 30 which check the data transfer route through which data is transferred from an issue source device, and transfer route information (command) is used for transfer data from PM devices 1 to data storage controllers 2 and 3. The bus route diagnostic circuit 30 analyzes and compares diagnostic data transmitted from the issuing source PM device 1 by an adapter device of the reception destination to check whether the bus route is faulty or not. Consequently, a fault which cannot be detected by parity check and data corruption due to a fault or the like are detected. |
