发明名称 FRAME SYNCHRONIZATION SYSTEM
摘要 <p>PURPOSE:To reduce mis-detection of synchronization and to decrease a time till synchronization detection by providing a synchronization state information bit to send synchronization data different from the synchronization state at the synchronized side from a synchronization side and detecting the synchronization corresponding to it at the synchronized side. CONSTITUTION:When the synchronization is not taken in equipment B, a B' insertion section 55 inserts the synchronization state information bit B' representing it that the equipment B is not synchronized to a main signal and the result is sent to equipment A. Then the equipment A uses a B' extraction section 41 to extract the equipment B' and selectors 44, 47 are selected and 1st synchronization data from a synchronization pattern generating section 42 and a timing signal corresponding to the data from the timing generating section 45 are selected. Thus, the 1st synchronization data and the bit B' are inserted to the main signal in a required timing and sent to the equipment B by a frame format when no synchronization is taken. The equipment B uses a B' extract section 53 to extract the bit B' and a selector 54 selects the synchronization detection section 51 to detect the synchronization.</p>
申请公布号 JPH05175950(A) 申请公布日期 1993.07.13
申请号 JP19910308924 申请日期 1991.11.25
申请人 FUJITSU LTD 发明人 MORI KENICHI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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