| 摘要 |
PURPOSE:To reduce the circuit scale by using one circuit to divide the processing timewise and implementing each processing independently when similar signal processing is implemented for plural number of times within a reference frame. CONSTITUTION:A multi-frame bit m1 in a data signal SD in the processing of a multi-frame M1 is fetched with a control signal SC1 from a control circuit 6 with a reference signal SR to an input circuit 1 and the bit m1 is sent to a comparator circuit 3. Then the comparator circuit 3 compares the multi-frame patterns, sends the result to a protection discrimination circuit 5, the circuit 5 fetches the result of the protection discrimination circuit 5 of one preceding frame from the storage circuit 2, the signal is operated with the result outputted from the comparator circuit 3 and synchronization information SY1 is outputted. Then the processing of the multi-frames M2, M3 is implemented similarly. When the similar signal processing is implemented within the reference frame for plural number of times, the processing is divided timewise by one circuit and each processing is implemented independently to reduce the circuit scale. |
