发明名称 Sync signal detection system in a memory system for recording and reproducing block unit data
摘要 There is provided a signal processing system for recording and reproducing a video signal and a digital audio signal with a rotary-head VTR and, more particularly, a memory control system which generates a block address and a memory write signal so that the sync signal for reproduced digital data is detected reliably and the digital data is stored in the memory circuit correctly.
申请公布号 US5228041(A) 申请公布日期 1993.07.13
申请号 US19900627928 申请日期 1990.12.17
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 YOSHINO, TADASHI;YAMAGUCHI, SUSUMU;KOMAE, HITOSHI;ISHIWATA, TETSUO;YAMAUCHI, EIJI;TANAKA, HIROSHI
分类号 G11B20/10;G11B20/12;G11B20/18;G11B27/30;H04N5/935;H04N9/802 主分类号 G11B20/10
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