发明名称 FM DEMODULATION CIRCUIT
摘要 PURPOSE:To prevent generation of demodulation noise of an FM modulation signal with a discontinuous phase by detecting a dropout of the FM demodulation circuit by a hold circuit depending on an amplitude of the FM modulation signal and phase information. CONSTITUTION:The PLL demodulation circuit is made up of a phase comparator 4, a voltage controlled oscillator 5 and a low pass filter 6, and a 1st output of a phase shifter 9 divides an output of the voltage controlled oscillator 5 to 1st and 2nd outputs whose phase differs by 90 deg. is fed to the phase comparator 4 to implement PLL demodulation. The 2nd output is fed as a clock signal input to a balanced modulator 10 receiving an FM modulation signal, and an output of the low pass filter 6 is extracted as an output of a sample-and-hold circuit 7 sampling-and-holding in response to the output of a balanced modulator 10.
申请公布号 JPH05175735(A) 申请公布日期 1993.07.13
申请号 JP19910003736 申请日期 1991.01.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAEKI TAKAHARU
分类号 H03D3/02;G11B20/06;H03L7/06;H04N5/93 主分类号 H03D3/02
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