| 摘要 |
<p>PURPOSE:To reduce the frame synchronization lock time and to decrease the circuit scale by storing pattern coincidence/dissidence information of all bits for each frame in the frame detection for serial data transmission. CONSTITUTION:Suppose that a pattern coincidence/dissidence detection section 1 detects the pattern coincidence/dissidence as to a bit in a frame. Then a frame detection counter section 2 receives number of times of coincidence/ dissidence up to a previous time as to the bit and synchronization establishment information from a frame information storage section 3. Then the information is revised (counted up or down) and the result is stored in the frame information storage section 3. Thus, the frame is detected simultaneously as to all bits in a frame for the discrimination from the start till its establishment. Thus, the frame synchronization is established in a time of several minutes after the protection of synchronization establishment. Then a large change or the like is not required as to plural data and the circuit scale is reduced.</p> |
