发明名称
摘要 PURPOSE:To make bit operation in a microcomputer easy by forming a temporary register storing numbers to be calculated, an FF storing operands, a bit selecting circuit selecting an optional bit, and a logical operation circuit. CONSTITUTION:Information to be operated at its bits is outputted from a memory to buses 0-7 by an operation control circuit 11 and inputted to the temporary register 12 by a signal (b). The control circuit 11 sends selecting information for selecting one bit to the buses 0-2 and inputs said information to a selecting register 13 by a signal (a). The selecting register 13 stores said information and also outputs the information to a selecting circuit 14 as signals f-h. In addition, the control circuit 11 sets up the information to an FF16 by a signal (d) in accordance with bit operation to be executed and the FF16 outputs the information to a logical operation circuit 17 as a signal (j). The selecting circuit 14 selects one bit in the temporary register 12 by the signal f-h and outputs the selected bit to the circuit 17 as a signal (i). The operation circuit 17 executes logical operation specified by a signal (e) and outputs the result as a signal (k).
申请公布号 JPH0545978(B2) 申请公布日期 1993.07.12
申请号 JP19830045473 申请日期 1983.03.18
申请人 NIPPON ELECTRIC CO 发明人 NAKAHIRA MAMORU
分类号 G06F7/00;G06F7/76;G06F9/308;(IPC1-7):G06F7/00 主分类号 G06F7/00
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