| 摘要 |
The method comprises (a) forming a conductive well and field oxide, (b) forming buffer oxide (1) and nitride (2), (c) removing (1) and (2) of the trench region, (d) etching the exposed substrate to form a trench, (e) forming trench oxide (3), (f) removing (3) for a buried contact region, (g) implanting N+ S/D ions into the buried contact region, (h) removing (2) to form storage node (4) and high dielectric layer (5), (i) depositing plate polysilicon on (5), (j) patterning (4) to form plate (6), (k) thermally oxidizing the whole surface to form polysilicon oxide (7), (1) depositing and patterning gate polysilicon (9) and cap gate oxide (10) to form a gate, and (m) implanting N- S/D ions and forming sidewall spacer (11) at the gate and implanting N+ S/D ions.
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