发明名称
摘要 PURPOSE:To accelerate graphic plotting by reducing the number of times of memory access. CONSTITUTION:This device is provided with an address comparator 3 for detecting coincidence between plotting addresses A and AL of plural picture elements p1 and p2 in continuous plotting orders. Then, a plotting mask link circuit 4 is provided to output a link plotting mask MC of the plural picture elements p1 and p2 corresponding to an address coincident signal CA. Further, a plotting data link circuit 5 is provided to output link plotting data PC of the plural picture elements p1 and p2 similarly.
申请公布号 JP2959297(B2) 申请公布日期 1999.10.06
申请号 JP19920268293 申请日期 1992.10.07
申请人 NIPPON DENKI KK 发明人 KATAYAMA HIROSHI
分类号 G06F12/00;G06T1/60;G06T11/00;(IPC1-7):G06T1/60 主分类号 G06F12/00
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