发明名称 MEMORY ACCESS PROCESSOR
摘要 PURPOSE:To suppress the deterioration of performance by appropriately registering the V-bit and M-bit of an address array or compulsorily swapping out data so that the contradiction of data is not generated when a correctable error occurs. CONSTITUTION:Data transmitted from a main storage device 3 is transmitted to an error detection/correction means 7. When the correctable error is detected, the erroneous bit is checked and it is corrected. The data is written into a data array 5. A corresponding address at this time is written into the address array 6. When no correctable error is present thereon, the V-bit is validated and the M-bit is invalidated if the request of a request source is read, and the V-bit and the M-bit are validated and registered if the request is write. When the correctable error is present thereon, the M-bit is validated even if the request of the request source is read or write so as to register it in the address array 6. Thus, swap-out is executed without fail when data is substituted next.
申请公布号 JPH05165719(A) 申请公布日期 1993.07.02
申请号 JP19910353057 申请日期 1991.12.18
申请人 NEC ENG LTD 发明人 HARA TADASHI
分类号 G06F12/08 主分类号 G06F12/08
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