发明名称 METHOD FOR INSPECTING FLOAT OF TERMINAL OF INTEGRATED CIRCUIT AND CIRCUIT BOARD INSPECTION APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a method for inspecting floating of terminals of integrated circuits which can reduce costs for the inspection. SOLUTION: According to this method, inspection probes 5, 5g are brought in touch with circuit patterns 4, 4g to which a signal terminal 3 of an integrated circuit to be inspected, e.g. 2a and either one of a power source terminal 3p and a ground terminal 3g of the circuit are to be connected. A predetermined current is fed to an internal diode 52 in the integrated circuit 2a via the inspection probes 5, 5g. An electric parameter indicating a connection state of the internal diode 52 is measured. Floating of the terminals of the integrated circuit 2a to the circuit patterns 4, 4g is inspected on the basis of the measured electric parameter. In this case, a current including at least an a.c. component is fed as the predetermined current, and the electric parameter on the basis of the a.c. component included in the predetermined current passing the internal diode 52 is measured.
申请公布号 JPH11248781(A) 申请公布日期 1999.09.17
申请号 JP19980067878 申请日期 1998.03.02
申请人 HIOKI EE CORP 发明人 KOIKE SHINICHI
分类号 H05K13/08;G01R31/02;G01R31/26;H05K3/00 主分类号 H05K13/08
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