发明名称 IMAGE PROCESSOR
摘要 <p>PURPOSE:To miniaturize a hardware by storing a YC component in a first and a second memories, and storing compressed data obtained by a compressing operation of a YC signal in a third memory. CONSTITUTION:Bidirectional buffers 35A, 35B and 36B are set in the direction for executing a data transfer to a compressing/expanding part from a memory side, a bidirectional buffer 37A is set in the direction for executing a data transfer to the memory part from the compressing/expanding part side, and data of a Y component stored in a first memory 15, and data of a C component stored in a second memory 16 are transferred successively to the compressing/ expanding part through a buffer 35C, buses 6C, 6B, the bidirectional buffer 35B, a bus 6A, the bidirectional buffer 35A, and a bus 6, and through a buffer 36C, buses 7C, 7B, the bidirectional buffer 36B, a bus 23, the bidirectional buffer 35A, and the bus 6, respectively, and compression of data is executed. Subsequently, the compressed data is stored in a third memory 17 through a bus 8, the bidirectional buffer 37A and a bus 8A.</p>
申请公布号 JPH05167864(A) 申请公布日期 1993.07.02
申请号 JP19910330289 申请日期 1991.12.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KOBAYASHI AYA;AMANO YOSHINORI;MIHASHI MASATOMO
分类号 H04N1/41;G06T9/00;H04N11/04 主分类号 H04N1/41
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