发明名称 CODEERORGAAN VAN HET TYPE MET OPEENVOLGENDE BENADERING VOOR HET OMZETTEN VAN EEN ANALOOG SIGNAALMONSTER IN EEN MEER-BITS PCM-CODEWOORD.
摘要 A reduction in idle channel noise and crosstalk in a mid-riser-biased successive approximation encoder is achieved through the use of two polarity decisions. Encoder (401) assigns a sampled analog input signal to the closest one of a multitude of discrete signal levels or code steps. A comparator (109) provides this assignment by successive comparisons of the sampled signal with a series of reference signals (110). Each comparison produces a binary digit. The first comparison, or polarity decision, is not transmitted and instead coupled to feedback circuitry (401) to reduce any dc component in the analog input signal to substantially zero. A second polarity decision is then made using a non-zero offset reference signal (402) corresponding to an intermediate position on a code step, typically the midpoint. The non-zero offset reference signal is applied along with subsequent reference signals to the comparator to determine the closest code step. The binary digit from the second polarity decision, along with the binary digits representing the code step, are coupled to the encoder output. Accordingly, the encoder is now biased at the intermediate position to substantially reduce the likelihood of idle channel noise and crosstalk enhancement.
申请公布号 NL190215(B) 申请公布日期 1993.07.01
申请号 NL19810004433 申请日期 1981.09.28
申请人 WESTERN ELECTRIC COMPANY, INCORPORATED TE NEW YORK, NEW YORK, VER. ST. V. AM. 发明人
分类号 H03M1/38;H03M1/00;H04B14/04 主分类号 H03M1/38
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