| 摘要 |
<p>Within the delayed detection type demodulator, the received signal is first quantized by a limiter amplifier 10 and then subjected to frequency conversion by a frequency converter 50 including; an exclusive OR element 51; a shift average generator 52 consisting of a shift register 53 and an adder 54; and a comparator 55. In response to the output of the frequency converter 50, the phase comparator 60 outputs a relative phase signal representing the phase shift of the received signal after frequency conversion relative to the phase reference signal. The phase comparator 60 includes: an exclusive OR element 61; an absolute phase shift measurement means 62 consisting of an adder 63 and D flip-flop arrays 64 and 65; and a D flip-flop 66 serving as a phase shift polarity judgment means. Alternatively, the phase detection circuit 400 for generating the relative phase signal may include: a half-period detector means 901 consisting of a delay element 401 and an exclusive OR element 402; a phase reference signal generator means 902 consisting of a modulo 2N counter 403; and a phase shift determiner means 903 consisting of a phase inversion corrector 500 and a D flip-flop array 404. The delay element 40 delays the relative phase signal by one symbol period and the subtractor 41 outputs the phase difference signal representing the phase transition over each symbol period of the received signal. The judgment circuit 42 obtains the demodulated data from the phase difference signal.</p> |
