发明名称 |
SENSE AMPLIFIER WITH IMPROVED SENSITIVITY |
摘要 |
A high speed sense amp supplies current to a bit line connected to a memory cell transistor and also detects a potential of the bit line. The potential of the bit line varies according to a conductive state of the memory cell transistor. The sense amp includes a load element and a first transistor connected in series between a first potential and the bit line. A second transistor is connected between the first potential and the bit line. The bit line is input to an inverter that has its output terminal connected to a gate of the first transistor. A differential amp has a first input terminal connected to a reference potential and a second input terminal connected to a node between the load element and the first transistor. The output of the differential amp indicates a difference between the reference potential and the bit line potential.
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申请公布号 |
US2002000841(A1) |
申请公布日期 |
2002.01.03 |
申请号 |
US19990270289 |
申请日期 |
1999.03.16 |
申请人 |
RAI TOSHIKI;YOSHIKAWA SADAO |
发明人 |
RAI TOSHIKI;YOSHIKAWA SADAO |
分类号 |
G11C7/06;G11C16/26;(IPC1-7):H03F3/45 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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