发明名称 |
ROUTING TECHNIQUE FOR A HIERARCHICAL INTERPROCESSOR-COMMUNICATION NETWORK BETWEEN MASSIVELY-PARALLEL PROCESSORS |
摘要 |
A routing process for a single-instruction-multiple-data (SIMD) multi-level hierarchical network of nodes, which are arranged in clusters and interconnected by dual, unidirectional channels, are used to send data packets including routing address information during a succession of routing cycles from transmitting ones to receiving ones of a large number of parallel processors (e.g., 4096 processors arranged in a hierarchy of 8 cabinets, each of which contains a cluster of 8 circuit boards, with each circuit board containing a cluster of 64 processors). Each of the nodes includes a storage buffer having a capacity equal to a given number which is one more than the total number of channels terminating at that node. This routing process guarantees prevention of deadlock between levels and buffer overflow, and offers high-speed, low-cost interprocessor communication for SIMD computers.
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申请公布号 |
US5224100(A) |
申请公布日期 |
1993.06.29 |
申请号 |
US19910697556 |
申请日期 |
1991.05.09 |
申请人 |
DAVID SARNOFF RESEARCH CENTER, INC. |
发明人 |
LEE, SUE-KYOUNG;CHIN, DANNY |
分类号 |
G06F15/16;G06F15/173;G06F15/80 |
主分类号 |
G06F15/16 |
代理机构 |
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