摘要 |
PURPOSE:To remove a sampling error by detecting and storing the position of a sampling error from a phase relation between sampling pulses and set timing pulses and by correcting the error in the process of data processing. CONSTITUTION:Sampling pulse (B) and set timing pulse (C) are applied as the set pulse of FF1 and the reset pulse of FF1 respectively, and output Q' of FF1 and pulse (C) are applied to terminal D of FF2 and clock terminal C, so that an output will appear at output Q of FF2 in double sampling. Further, pulse (C) is applied as the set pulse of FF1, pulse (B) is applied as the reset pulse of FF1 and the clock pulse of FF2, and output Q' of FF1 is applied as input D of FF2, so that an output can be obtained in case of the bit absence of output Q of FF2. The pulse position of FF2 is stored and one excessive bit is omitted at the time of double sampling in data processing. In case of bit absence, ''0'' is added to data to correct the data. |