| 摘要 |
PURPOSE:To reduce memory capacity or the scale of a hard logic circuit by extracting only the change points of data in each dimension of horizontal, vertical and depth directions and time axis and utilizing them as addresses of a memory or hard logic circuit. CONSTITUTION:A to C and time timing memories 11A to 11D are provided which extract respective change points of the horizontal, vertical and depth directions and time axis to be used for stereoscopic (3-D) display. These memories 11A to 11D output change point data H1 to HN, V1 to VN and D1 to DN of picture elements in the respective horizontal, vertical and depth directions and time axis by means of addressed to be outputted by respective counters 10A to 10D based on a reference clock CLK. Receiving these data, a video signal generation memory 12 performs a prescribed processing based on these change point data and outputs a 3-D video signal. Thus, the 3-D video signal can be obtained in the memory having a small storage capacity or the hard logic circuit having small circuit scale. |
