发明名称 DEVICE/MEMORY CONTROL SYSTEM FOR COMPUTER SYSTEM
摘要 PURPOSE:To control end update a control subject device in a short application time of a CPU by controlling the control subject device in a short control period with the large load of the device and in a long control period with the small load of the device respectively. CONSTITUTION:A load measuring device 12 measures the load state value of a control subject device 10, and a control period deciding device 14 decides the small control period value with a large load state and the large control period value with a small load state respectively in accordance with the load state value measured by the device 12. Then a controller 13 controls the device 10 based on the control period value decided by the device 14. Therefore it is not so much required to control the device 10 with a sparse load of the device 10. Thus the controller 13 controls the device 10 in a long period.
申请公布号 JPH05158744(A) 申请公布日期 1993.06.25
申请号 JP19910326266 申请日期 1991.12.11
申请人 FUJITSU LTD 发明人 SAKATA AKINORI
分类号 G06F9/46;G06F11/30;G06F11/34;G06F12/12 主分类号 G06F9/46
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