发明名称 -Method and control circuit for jitter buffers
摘要 <p>A propagation delay specific to the buffering is detected for data packets (DP1,DP2,DP3) in the data packet stream. Weighted delay averages are continuously derived from the propagation delays, and a smaller propagation delay is more heavily weighted than a larger propagation delay. The read-out rate (CLK) of the jitter buffer is controlled dependent on the continuously derived delay averages, so that the averages are adjusted to a predetermined set delay. An independent claim is included for a jitter buffer control circuit.</p>
申请公布号 EP1460810(A2) 申请公布日期 2004.09.22
申请号 EP20040100308 申请日期 2004.01.29
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 BAUER, WOLFGANG;FALLY, GERHARD
分类号 H04L12/801;H04L12/835;H04L12/841;(IPC1-7):H04L12/56 主分类号 H04L12/801
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