| 摘要 |
An apparatus for sum-of-product operation includes a multiplier (1), a pipeline register (2) for holding the result of multiplication, and an adder (3) for adding the output of the pipeline register or an addend to an augend. Timing signal generation means (4) generates first and second timing signals (T1, T2) in synchronism with first and second clocks (CK1, CK2). A first instruction latch (5) holds an instruction in synchronism with the first timing signal (T1) and outputs a first control signal. A second instruction latch (6) holds the instruction held by the first instruction latch (5) in synchronism with the second timing signal (T2) and outputs a second control signal. A control signal selector (7) outputs the second control signal to the adder (3) in response to the first timing signal (T1), and outputs the first control signal to the adder (3) in response to the second timing signal (T2). <IMAGE> |
