| 摘要 |
The circuit records/reproduces the effective portion of video into field memory to remove jittering of video signal without using servo control. The circuit includes an A/D converter (10) for converting analog video signal to digital signal, a field memory (20) of FIFO type for storing effective video data, a sync. separator (40) for separating the input video into horizontal and vertical sync., a write PLL clock generator (50) for generating write clock (WCK), a read-start pulse generator (90) for generating read-start pulse reset signal:RRST), and a sync. inserting circuit (100) for adding video signal and sync. signal to generate composite video signal.
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