发明名称 |
APPARATUS AND METHOD OF COMPENSATING FOR PHASE DELAY IN SEMICONDUCTOR DEVICE |
摘要 |
There is provided an apparatus for minimizing a skew occurring due to a change of data pattern by previously recognizing data pattern before data is outputted from the semiconductor device. The apparatus of compensating for a phase delay in a semiconductor device having a delay locked loop (DLL) for generating DLL clock includes: a data pattern detection block for detecting patterns of data loaded on data line and determining delay compensation amount of the data inputted to data output driver based on the detected data patterns; and a delay compensation block for compensating for phase delay of clock relating to the DLL clock inputted to the data output driver under a control of an output signal of the data pattern detection block.
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申请公布号 |
US2005041483(A1) |
申请公布日期 |
2005.02.24 |
申请号 |
US20040883099 |
申请日期 |
2004.06.30 |
申请人 |
KIM KYUNG-HOON |
发明人 |
KIM KYUNG-HOON |
分类号 |
G06F1/10;G11C7/10;G11C11/407;H03K5/00;H03K5/13;H03L7/081;(IPC1-7):G11C7/00 |
主分类号 |
G06F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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