发明名称 System and method for correcting an inaccurate clock
摘要 System and method for correcting an inaccurate clock with the use of an accurate reference clock. A preferred embodiment comprises repeatedly counting clock cycles in a clock signal generated by the inaccurate clock for a specified period of time, after the completion of each specified period of time, computing a delta value based on the clock cycle counts of the clock signal of the inaccurate clock, accumulating a delta sum value, and computing a clock adjustment value for the inaccurate clock based upon the delta sum value. The reference clock is used to mark the end of each specified period of time.
申请公布号 US2006195281(A1) 申请公布日期 2006.08.31
申请号 US20050066375 申请日期 2005.02.25
申请人 DHAMANKAR SUDHIND;VENKATRAMAN SRINIVASAN 发明人 DHAMANKAR SUDHIND;VENKATRAMAN SRINIVASAN
分类号 G06F19/00 主分类号 G06F19/00
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