发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To obtain the signal processing circuit whose vertical resolution is improved by forming one set of luminance signals Ach, Bch whose phase is deviated spatially by one line based on an output signal of a CCD imager and outputting them simultaneously. CONSTITUTION:Two horizontal registers 3, 5 are provided to a CCD imager 1, and signals are obtained independently from all picture elements. The register 3 is provided to be corresponding to an odd number field and the register 5 is provided to be corresponding to an even number field. The signals are outputted from the registers 3, 5 and enter a simultaneous processing circuit 20 via delay circuits 40, 50, 60 and 10, 30 respectively whose delay time is set to be one horizontal period, in which the signals are processed simultaneously and one set of luminance signals Ach, Bch are formed whose phase is resident between the original lines and deviated by a line spatially. Since a Y signal whose line number is 525 is obtained by using the signals simultaneously, the signal whose vertical resolution is improved and whose color sharpness is improved is obtained.
申请公布号 JPH05153602(A) 申请公布日期 1993.06.18
申请号 JP19910315024 申请日期 1991.11.28
申请人 SONY CORP 发明人 YAGI OSAMU;WAKAGI TORU
分类号 H04N9/07;G06T11/60 主分类号 H04N9/07
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