发明名称 WATCH DOG TIMER
摘要 PURPOSE:To detect the abnormal operation of a computer in the early stages. CONSTITUTION:In a watch dog timer 10a detecting the abnormal operation of a one-chip microcomputer 1a in the case of a clear code to be written in the prescribed address area of the one-chip microcomputer 1a in the prescribed cycle, the output signal of a set value detecting circuit 13 becomes low level and an AND gate 12 becomes high level, thereby turning the output signal of an AND gate 18 to be the high level and the output signal of an OR gate 19 to the high level when the data except the clear code is written in the prescribed address. Thus, the one-shot pulse of the negative logic is outputted from a one-shot multivibrator 20, a CPU 4 is reset, and the entire one-chip microcomputer 1 is reset.
申请公布号 JPH05151027(A) 申请公布日期 1993.06.18
申请号 JP19910314424 申请日期 1991.11.28
申请人 MITSUBISHI ELECTRIC CORP 发明人 HIROSE SHINICHI
分类号 G06F11/00;G06F11/30 主分类号 G06F11/00
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