| 摘要 |
<p>PURPOSE:To increase the processing speed without using any complex external circuit for an external storage device which differs in access time. CONSTITUTION:This microprocessor includes an execution address generation unit 2 which calculates a virtual address corresponding to a virtual storage with the instruction of an external main storage 13 and a high-speed converting buffer mechanism 4 and is equipped with a memory control unit 3 which converts the virtual address into an actual address and outputs WAIT bits 101 and 102, an access control unit 7 which uses the actual address as the address signal of the main storage 13 with a READY signal 108 and outputs a bus cycle start signal 104 and a bus cycle end signal 105, and a counter 6 which counts the WAIT bits 101 and 102 with the bus cycle start signal 104 and bus cycle end signal 105 and outputs a WAIT signal 106; and the READY signal 108 is generated as the output of a NAND circuit 11 corresponding to the two inputs of the EWAIT signal 107 of the main storage 13 and the WAIT signal 106.</p> |
