| 摘要 |
PURPOSE:To correct skew between timing generators, without an arithmetic circuit or arithmetic processing. CONSTITUTION:Skew correction data is stored in a register 1, and timing data is stored in a register 2. The output of the register 1 is preset to a counter 3 by a start signal 11 synchronous with a clock pulse 12. When the output of the counter 3 counted by the clock pulse 12 coincides with the output of the register 2, a timing signal is outputted from a coincidence detecting circuit 4. The timing signal is generated at the delay time set to the start signal 11 so as to correct skew between the timing signals of plural timing generators. |
