| 摘要 |
PURPOSE:To exclude an excessive lag in access time by checking an access time, which corresponds to an access request, by using a shift type memory and then by processing the access request on the bais of the check result. CONSTITUTION:On receiving an access request from the channel of a request unit, a controller, when the access request is acceptable, reads address register 26 of memory unit 15 and compares read data to a start address received from the channel of start register 18. When the contents of register 26 are found much smaller as a result of the comparison, an actuation signal is sent to line 32 to shift memory loop 21 and reading circuit 24 attains access by writing circuit 25. On the other hand, when they are greater, loop 21 is instructed to make a shift up to the start address position to be accessed and another processing is carried out. Then, when any other access request arrives status line 38 is checked to judge whether loop 21 has been shifted up to the start address and when access can be attained, the access is attained. |
