| 摘要 |
In a gain-cell type semiconductor memory element having a first MOSFET and a second MOSFET, the sources of the first and second MOSFETs are connected to a bit line, the drain of the first MOSFET and the gate of the second MOSFET are connected to each other to serve as a charge storage region, the gate of the first MOSFET is connected to a write word line, the drain of the second MOSFET is connected to a power supply line, and the channel region of the second MOSFET is capacitively coupled via an insulating layer with a read word line thereby to receive substrate biasing by capacitive coupling from the read word line.
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