发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To provide a semiconductor memory device in which stress in fine MOSFETs can be relaxed without interrupting an external high voltage and influence of the fluctuation of supply current is suppressed. CONSTITUTION:The semiconductor memory device comprises a voltage step- down circuit 7, first and second power supply voltage converting circuits 8, 9, a first NPN transistor 29, and first to third MOSFETs 12, 13, 30. When data is written into a memory, the voltage step-down circuit 7 receives a power supply voltage Vpp and supplies a power supply voltage Vpp' to the first and second power supply voltage converting circuits 8, 9. The fist and second power supply voltage converting circuits 8, 9 are turned ON by a control signal and thereby an N-channel MOSFET 30 turns ON to produce a power supply voltage Vout at an output terminal 14. When data is read out from the memory, the N-channel MOSFET 30 turns OFF and the N-channel MOSFET 13 turns ON to produce a power supply voltage Vcc at the output terminal 14.</p>
申请公布号 JPH05144279(A) 申请公布日期 1993.06.11
申请号 JP19910308682 申请日期 1991.11.25
申请人 TOSHIBA CORP 发明人 MIYAMOTO JUNICHI
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
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