| 摘要 |
<p>PURPOSE: To attain grade-up/grade-down only by exchanging an arithmetic processing unit by accepting an identification signal by a socket, generating a clock frequency according to this signal, or enabling or inhibiting the usage of a signal path. CONSTITUTION: An identifying circuit 14 generates a signal for identifying the classification of an arithmetic processing unit (not shown in a figure) accepted by a socket 10. A clock generator 7 generates a clock frequency for the classification of the arithmetic processing unit in response to the identification signal accepted by the socket 10. A usage enabling circuit (selector) 15 enables and inhibits the usage of a signal to an arithmetic controller (not shown in a figure) in the socket 10 in response to the identification signal. Thus, even in a present situation in which a new kind of central processing unit (computer system) is successively on sale, grade-up/grade-down can be attained without any changed part only by exchanging the arithmetic processing unit.</p> |
