| 摘要 |
<p>PURPOSE:To obtain the delay circuit whose pulse delay time is varied in response to a power supply voltage for control use. CONSTITUTION:A P-channel MOS transistor(TR) 3 is inserted between a positive power supply terminal VDD and a CMOS inverter circuit N1 receiving a binary pulse, an N-channel MOS TR 4 is inserted between the CMOS inverter circuit N1 and a negative power supply terminal VSS and a control power supply is connected to gates of the MOS TRs 3, 4. Then the voltage of the control power supply is varied to control each drain current and the delay time of the output pulse of a CMOS inverter circuit N2 is varied by changing the charge/discharge time in the load capacitor of the CMOS inverter circuit N1.</p> |
