| 摘要 |
PURPOSE:To sharply improve the throughput of the whole system by judging the necessity/unnecessity of post processing to be executed after operation such as addition and subtraction in accordance with the instruction of a command, and when it is unnecessary, omitting it. CONSTITUTION:A floating point register FRG is generally specified by an operand exponential field in a command code. An output from the register FRG is inputted from X and Y buses and the arithmetic result of a floating point arithmetic unit(FAU) for computing a floating point is stored in a temporary register(TRG). A post processing judging circuit EXD judges whether post processing is necessary or not while observing the arithmetic result. For instance, data are read out from the register FRG on an operation execution stage and a result computed by the FAU is stored in the register TRG on the succeeding post processing information detecting stage. Since whether post processing is necessary or not is judged by a post processing information judging circuit EXD on this stage, gates G1 to G3 can be switched and controlled by a data switch circuit SWC. |
