发明名称 MEMORY
摘要 PURPOSE:To utilize memory area of an EEPROM or the like effectively by recording data, stored in a preceding data area, while rearranging into a square matrix and additionally providing each row and column of the data with one check bit. CONSTITUTION:(m) data of X1.1, X1.2, ... X1.m, X2.1, X2.2, ... X2.m, ... Xm.1, Xm.2, >=Xm.m are written in column direction for each row of a data area 15. A check bit area 16 is provided for each row and column wherein respective rows are additionally provided with check bits X1.m+1, X2.m+1, ... Xm.m+1 while respective columns are additionally provided with check bits Xm+1.1, Xm+1.2, Xm+1.m, Xm+1.m, Xm+1.m+1. In other words, data are rearranged into a square matrix.
申请公布号 JPH05144287(A) 申请公布日期 1993.06.11
申请号 JP19910300654 申请日期 1991.11.15
申请人 YOKOGAWA ELECTRIC CORP 发明人 OURA MIKIO;MAEDA NAOKI
分类号 G11C17/00;G11C16/06;G11C29/00;G11C29/42 主分类号 G11C17/00
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