发明名称 METHOD FOR OPTIMIZING ERROR CORRECTIONS FOR BINARY LOGIC COMPONENTS
摘要 <p>Error correction values for binary logic components used in providing a phase shift to an RF signal are optimized to provide improved overall performance. Initially, each component is adjusted to minimize the overall phase error while the other components are in an inactive state. After the initial adjustment, statistical methods based on Tables of Contrasts and Yates' Algorithm are used to determine full-factorial main effects. A full-factorial analysis is a statistical analysis in which the responses of all possible binary logic states are compared. The full-factorial analysis is used to quantify the main effects which are the error contributions of each of the individual binary logic components. These main effects are then used as error correction or adjustment values for the binary logic components.</p>
申请公布号 WO1993011442(A1) 申请公布日期 1993.06.10
申请号 US1992009610 申请日期 1992.11.06
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