发明名称 BROADBAND INPUT BUFFERED ATM SWITCH
摘要 Broadband ATM switches for switching ATM packetized data in timeslots are disclosed. In one embodiment, the switch includes input buffer, a space switch for connecting input ports and output ports at successive timeslots and a system scheduler. The timeslot utilization processing is carried out by using a content addressable memory. A bit map is provided for registering the timeslot utilization of the input ports and the output ports. An encoder determines the earliest commonly available timeslot for connecting input ports and their requested output ports. There is further disclosed an architecture in which groups of input ports share common buffer memories and in which the system scheduler processes grouped inputs, thus taking advantage of the architecture's similar characteristics and advantages to those of the common memory switch.
申请公布号 WO9307699(A3) 申请公布日期 1993.06.10
申请号 WO1992CA00431 申请日期 1992.09.30
申请人 NORTHERN TELECOM LIMITED 发明人 GRIMBLE, KENNETH, NORMAN;ANDERSON, KEITH, DOUGLAS
分类号 H04Q3/00;H04L12/56;H04Q3/52;H04Q11/04;(IPC1-7):H04L12/56 主分类号 H04Q3/00
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