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发明名称
LAYOUT DESIGN METHOD FOR INTEGRATED CIRCUIT
摘要
申请公布号
JPH05143687(A)
申请公布日期
1993.06.11
申请号
JP19910307968
申请日期
1991.11.22
申请人
FUJITSU LTD
发明人
OE RYOICHI
分类号
H01L21/82;G06F17/50
主分类号
H01L21/82
代理机构
代理人
主权项
地址
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