发明名称 Large logical addressing method and means.
摘要 <p>A method and means of translating a large logical address as a large virtual address (LVA) when dynamic address translator (DAT) is on and for using the large logical address as a large real address (LRA) when DAT (33) is off. This LVA or LRA is used for locating data and instructions in a computer memory. Each LVA is separated into three concatenated parts: a highest-order part (ADEN) for indexing into an access directory (AD) to locate an entry (ADE) for locating one access list (AL); an intermediate part (ALEN) for indexing into a selected AL to access an entry (ALE) that enables location of an associated conventional address translation table which represents a conventional size virtual address space; and a low-order DAT VA part having the same size as the conventional type of virtual address. The low-order DAT VA part is translated by the associated translation table (48). This address translation of the low-order (DAT VA) part provides a real address that represents the translation of the LVA. The LVAs map into a large virtual address space (LVAS) represented by the sequence of valid ALEs in the set of ALs respectively represented by the sequence of valid ADEs in the AD. The sequence of ADEs in the AD respectively locate the ALs containing the ALEs which represent the LVAS. Thus, the range of LVAs (starting from zero) in the LVAS maps to the respective ALEs in the set of ALs. Each AL may contain a respective offset of ALEs that are not part of the LVAS. &lt;IMAGE&gt;</p>
申请公布号 EP0545076(A1) 申请公布日期 1993.06.09
申请号 EP19920118610 申请日期 1992.10.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BAUM, RICHARD IRWIN;PLAMBECK, KENNETH ERNEST;SCALZI, CASPER ANTHONY;SCHMALZ, RICHARD JOHN;SINHA, BHASKAR
分类号 G06F12/10;G06F12/02 主分类号 G06F12/10
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