Store and forward apparatus and method of maintaining integrity of data during storage.

摘要

A store and forward mechanism for telecommunication equipments including means (300) for deserializing a HDLC frame of data which is received from a first telecommunication node into a sequence of n-bits words. The frame includes a header, a data field and a frame checking sequence (FCS) generated by said first telecommunication node. The apparatus further includes processing means for generating n-bit words corresponding to a new header of said received HDLC frame. The store and forward apparatus comprises serializing means (600) receiving said processed n-bits words from said storage for generating a new HDLC frame comprising said new header field and a corresponding new FCS which is to be transmitted to said second telecommunication node. The apparatus further includes means (500) receiving the received HDLC frame simultaneously to the deserializing means and which computes a first partial FCS covering the data field only of the HDLC frame, and means (200) for storing that partial FCS. During the forward phase, the n-bits words which are to be transmitted to the next telecommunication node are simultaneously received by the HDLC serializer and by means (800) for computing a second partial FCS covering said data field only. At the end of the serialization process of the data field of the HDLC frame, the two partial results are compared in order to detect the occurence of an error which might have appeared in the storage during the computing of the new header of the frame. The result of that comparison is used as a control signal for altering the value of the FCS computed by the HDLC serializer before it is transmitted to the telecommunication line field of the HDLC frame, the two partial results are compared in order to detect the occurence of an error which might have appeared in the storage during the computing of the new header of the frame. The result of that comparison is used as a control signal for altering the value of the FCS computed by the HDLC serializer before it is transmitted to the telecommunication line. Since the computing of both the first and second partial FCS is respectively performed during the deserializing of the HDLC frame and the serializing of the processed n-bit data words, no extra delay is required. The integrity of data during its storage in RAM is therefore provided without needed additional processing resources since the processor which is included within the store and forward mechanism has its resources which remain fully allocated for the store and forward process. <IMAGE>