| 摘要 |
A logic probe system for an integrated circuit device under test, such as a dual in-line package (DIP) device having a plurality of spaced-apart signal pins, comprises a probe header, including a plurality of signal contacts, and a plurality of ground contacts in the probe header body. The signal contacts each include a spring contact for tightly coupling the signal contact to the pins of the device under test, and a pin end protruding from the header body. The ground contacts each comprise a ground pin end protruding upwardly from the header body, and a distal end conductively secured to a ground plane extruding through the header body. An attenuator clip couples one of the signal pins and an adjacent ground pin to an external measuring device in series with a fixed-value resistor. The signal contacts preferably are arranged in parallel rows proximate to the side edges of the header body. The ground contacts are likewise arranged in a second, inboard spaced-apart pair of rows. The attenuator comprises a fixed-value resistor coupled in series with an input socket and an output pin and a ground conductor extending therethrough. The invention further provides a method for testing an integrated circuit, using the device described above, wherein the device is secured to a device under test and coupled using the attenuator clip to a measuring device.
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